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Stanford EE Computer Systems Colloquium

What seminar
When 27 February 08
from 04:15 pm to 05:15 pm
Where HP Auditorium, Gates Computer Science Bldg. B01
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Scalable parallel programming with CUDA on manycore GPUs

About the talk:


The CUDA scalable parallel programming model provides
readily-understood abstractions that free programmers to focus on
efficient parallel algorithms. It uses a hierarchy of thread
groups, shared memory, and barrier synchronization to express
fine-grained and coarse-grained parallelism, using sequential C
code for one thread.


Since CUDA was released in 2007, developers have written scalable
parallel programs for a wide range of applications, including
computational chemistry, sparse matrix solvers, sorting,
searching, and physics models. These applications scale
transparently to hundreds of processor cores and thousands of
concurrent threads.


NVIDIA GPUs with the new Tesla unified graphics and computing
architecture run CUDA programs, and are widely avaialable in
laptops, PCs, workstations, and servers. The Tesla architecture
is massively multithreaded and scales to over one hundred
processor cores.


See http://www.nvidia.com/CUDA[2] for more information.


About the speaker:


John Nickolls is director of architecture at NVIDIA for GPU
computing. He was previously with Broadcom, Silicon Spice, Sun
Microsystems, and was a co-founder of MasPar Computer. His
interests include parallel processing systems, languages, and
architectures. Nickolls has a BS in electrical engineering and
computer science from the University of Illinois, and MS and PhD
degrees in electrical engineering from Stanford University.


Embedded Links:


ABOUT THE COLLOQUIUM:


See the Colloquium website, http://ee380.stanford.edu, for scheduled
speakers, FAQ, and additional information. Stanford and SCPD students
can enroll in EE380 for one unit of credit. Anyone is welcome to attend;
talks are webcast live and archived for on-demand viewing over the web.

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